Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
9.2.6 Service Order Control Block (Internal Structure)
If AL_RAM_CONFIG =0h, then the base address is 203000h (80C000h byte).
If AL_RAM_CONFIG =1h, then the base address is 208000h (820000h byte).
If AL_RAM_CONFIG =2h, then the base address is 210000h (840000h byte).
If AL_RAM_CONFIG =3h, then the base address is 240000h (900000h byte).
Index: 1h
Number of entries: 32
Type: Read/Write
Table 38. Service Order Control Block Summary
Index
Name
Read or Write
Description
0-1Eh
TX_SERVICE_TABLE
R/W
Table of the SC to serve if there are no cells in any of
the strict SCs for the transmit direction for VO =
Index.
1Fh
RX_SERVICE_TABLE
R/W
Table of the SC to serve if there are no cells in any of
the strict SCs for the receive direction.
9.2.6.1 TX_SERVICE_TABLE
The TX_SERVICE_TABLE is configured to provide an SCQ with a minimum cell rate. When no
strict cell is present, the queue service algorithm examines the SC named and serves a cell from
that class if there is one, advancing the pointer to this table. One of these tables exists for each
th
VO. Each table is 127 entries long (the 128 entry is not used).
Type: Read/Write
Long base offset: base_address + 128 × VO + entry
Index: 1h
Number of entries: 128
Format: Refer to the following table.
Field (Bits)
Description
RAM is not present in these bit locations.
Not present
(31:16)
Not used
(15:4)
Write with a 0 to maintain software compatibility with future versions.
FIRST_SC
(3:0)
SC to service if there are no strict service cells. To create a null entry, enter one of the
strict SCs.
181
PMC [ PMC-SIERRA, INC ]
