S/UNI®-JET Data Sheet
Released
Register 006H: S/UNI-JET Identification, Master Reset, and Global Monitor Update
Bit
Type
R/W
R
R
R
R
R
R
R
Function
RESET
TYPE[3]
TYPE[2]
TYPE[1]
TYPE[0]
Unused
ID[1]
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
0
0
0
X
1
0
ID[0]
This register is used for global performance monitor updates, global software resets, and for
device identification. Writing any value except 80H into this register initiates latching of all
performance monitor counts in the PMON, RXCP-50, and TXCP-50 blocks in all four quadrants
of the S/UNI-JET. The TIP register bit is used to signal when the latching is complete.
The CPPM Counter Registers are not latched by writing to Register 006H. Counters in the CPPM
can only be updated by writing to CPPM register addresses (322H – 32FH).
ID[1:0]
The ID[1:0] bits allows software to identify the version level of the S/UNI-JET.
TYPE[3:0]
The TYPE[3:0] bits allow software to identify this device as the S/UNI-JET member of the
S/UNI family of products.
RESET
The RESET bit allows software to asynchronously reset the S/UNI-JET. The software reset is
equivalent to setting the RSTB input pin low, except that the S/UNI-JET Master Test Register
is not affected. When a logic one is written to RESET, the S/UNI-JET is reset. When a logic
zero is written to RESET, the reset is removed. The RESET bit must be explicitly set and
cleared by writing the corresponding logic value to this register.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
96
PMC [ PMC-SIERRA, INC ]
