S/UNI®-JET Data Sheet
Released
Figure 65 Framer Mode G.832 E3 Transmit Input Stream
TICLK
Oct 530 Oct 530 Oct 530 Oct 530 Oct 530 Oct 530 Oct 530 Oct 530
FA1 FA1
8
Oct N
Oct N
Oct N
3
TDATI
FA1 FA1
FA1
3
FA1 FA1 FA1
6 7 8
1
2
1
2
3
4
5
6
7
4
5
1
2
TFPI/TMFPI
TFPO/TMFPO
Figure 66 Framer Mode G.832 E3 Transmit Input Stream With TGAPCLK
TICLK
TGAPCLK
Oct 530
Oct 530
Oct 530
Oct 530
Oct 530 Oct 530
Oct 530
Oct 530
8
Oct N
3
TDATI
Oct N
Oct N
1
2
1
2
3
4
5
6
7
The Framer Mode G.832 E3 Transmit Input Stream diagrams (Figure 65 and Figure 66) show the
expected format of the inputs TDATI, TFPI/TMFPI, and TICLK and the output TFPO/TMFPO
(and TGAPCLK) when the FRMRONLY bit in the S/UNI-JET Configuration 1 Register is set,
and the S/UNI-JET is configured for the E3 G.832 transmit format. TFPI or TMFPI pulses high
for one TICLK cycle and is aligned to the first bit of the FA1 byte in the G.832 E3 input data
stream on TDATI. TFPO or TMFPO will pulse high for one out of every 4296 TICLK cycles,
providing upstream equipment with a reference frame pulse. The alignment of TFPO or TMFPO
is arbitrary. There is no set relationship between TFPO/TMFPO and TFPI/TMFPI. The
TGAPCLK output is available in place of TFPO/TMFPO when the TXGAPEN bit in the S/UNI-
JET Configuration 2 Register is set to logic one, as in Figure 66. TGAPCLK remains high during
the overhead bit positions. TDATI is sampled on the falling edge of TGAPCLK.
Figure 67 Framer Mode G.832 E3 Receive Output Stream
RSCLK
Oct 530 Oct 530 Oct 530 Oct 530 Oct 530 Oct 530 Oct 530 Oct 530
Oct 1
2
Oct 1
RDATO
FA1 FA1
FA1 FA1 FA1
FA1 FA1 FA1
1
1
2
3
4
5
6
7
8
FA2
8
1
2
3
4
5
6
7
8
RFPO/RMFPO
ROVRHD
Figure 68 Framer Mode G.832 E3 Receive Output Stream with RGAPCLK
RGAPCLK
Oct 530
Oct 530
Oct 530
Oct 530
Oct 530 Oct 530
Oct 530
Oct 530
8
Oct 1
2
Oct 1
RDATO
1
1
2
3
4
5
6
7
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
314
PMC [ PMC-SIERRA, INC ]
