S/UNI®-JET Data Sheet
Released
Register 391H: TTB Trail Trace Identifier Status
Bit
Type
R
Function
BUSY
Unused
Unused
Unused
RTIUI
RTIUV
RTIMI
RTIMV
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
X
X
R
R
R
R
RTIMV
The receive trace identifier mismatch value status bit (RTIMV) is set high when the accepted
message differs from the expected message. RTIMV is set low when the accepted message is
equal to the expected message. A mismatch is not declared if the accepted trail trace message
string is all-zeros.
RTIMI
The receive trace identifier mismatch indication status bit (RTIMI) is set high when
match/mismatch status of the trace identifier framer changes state. This bit (and the interrupt)
is cleared when this register is read.
RTIUV
The receive trace identifier unstable value status bit (RTIUV) is set high when eight messages
that differ from its immediate predecessor are received. RTIUV is set low and the unstable
message count is reset when three or five (depending on PER5 control bit) consecutive
identical messages are received.
RTIUI
The receive trace identifier unstable indication status bit (RTIUV) is set high when the
stable/unstable status of the trace identifier framer changes state. This bit (and the interrupt) is
cleared when this register is read.
BUSY
The BUSY bit reports whether a previously initiated indirect read or write to the trail trace
RAM has been completed. BUSY is set high upon writing to the TTB Indirect Address
Register, and stays high until the access has completed. At this point, BUSY is set low. This
register should be polled to determine when either new data is available in the TTB Indirect
Data Register after an indirect read, or when the TTB is ready to accept another write access.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
224
PMC [ PMC-SIERRA, INC ]
