S/UNI®-JET Data Sheet
Released
RTIUIE
The receive trace identifier unstable interrupt enable (RTIUIE) control the activation of the
interrupt output when the receive trace identifier message changes state from stable to
unstable and vice versa. When RTIUIE is set high, changes in the state of the trail trace
message unstable indication will activate the interrupt output. When RTIUIE set low, trail
trace unstable state changes will not effect INTB.
RRAMACC
The receive RAM access (RRAMACC) control bit is used by the microprocessor to identify
that the access from the microprocessor is to the receive trace buffers (addresses 0 - 127) or to
the transmit trace buffer (addresses 128 - 191). When RRAMACC is set high, subsequent
microprocessor read and write accesses are directed to the receive side trace buffers. When
RRAMACC is set low, microprocessor accesses are directed to the transmit side trace buffer.
ZEROEN
The zero enable bit (ZEROEN) enables TIM assertion and removal based on an all-zeros path
trace message string. When ZEROEN is set high, all-zeros path trace message strings are
considered when entering and exiting TIM states. When ZEROEN is set low, all-zeros path
trace message strings are ignored.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
223
PMC [ PMC-SIERRA, INC ]
