S/UNI®-JET Data Sheet
Released
Register 35BH: TDPR Interrupt Enable
Bit
Type
Function
Unused
Unused
Unused
Reserved
FULLE
OVRE
UDRE
LFILLE
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
LFILLE
The LFILLE enables a transition to logic one on LFILLI to generate an interrupt on INTB. If
LFILLE is a logic one, a transition to logic one on LFILLI will generate an interrupt on
INTB. If LFILLE is a logic zero, a transition to logic one on LFILLI will not generate an
interrupt on INTB.
UDRE
The UDRE enables a transition to logic one on UDRI to generate an interrupt on INTB. If
UDRE is a logic one, a transition to logic one on UDRI will generate an interrupt on INTB. If
UDRE is a logic zero, a transition to logic one on UDRI will not generate an interrupt on
INTB.
OVRE
The OVRE enables a transition to logic one on OVRI to generate an interrupt on INTB. If
OVRE is a logic one, a transition to logic one on OVRI will generate an interrupt on INTB. If
OVRE is a logic zero, a transition to logic one on OVRI will not generate an interrupt on
INTB.
FULLE
The FULLE enables a transition to logic one on FULLI to generate an interrupt on INTB. If
FULLE is a logic one, a transition to logic one on FULLI will generate an interrupt on INTB.
If FULLE is a logic zero, a transition to logic one on FULLI will not generate an interrupt on
INTB.
Reserved
This bit should be set to logic zero for proper operation.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
187
PMC [ PMC-SIERRA, INC ]
