PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Figure 3
- Example 3. Multi-PHY Addressing Application
OSC
TSOC
TDAT[7:0]
TXPRTY
TCAMPH
TWA[1:0]
TWRMPHB
TFCLK
S/UNI-MPH
#1
RSOC
RDAT[7:0]
E
load
D
RXPRTY
RCAMPH
RRA[1:0]
ORDENB[1]
ODAT[7:0]
3-to-N
decoder
Q
RRDMPHB
UTOPIA
LEVEL 2
OPRTY[0]
OSOC
RFCLK
COMPLIANT OFCLK
Single-PHY
or
Multi-PHY
interface to
switch
TSOC
OAVALID
EGRESS
4:2
1:0
TDAT[7:0]
OADDR[4:0]
DEVICE
TXPRTY
TCAMPH
TWA[1:0]
TWRMPHB
TFCLK
OCA[1]
D
Q
OMASTER
OPOLL
S/UNI-MPH
RSOC
N-to-1
mux
#2
RDAT[7:0]
OBUS8
RXPRTY
RCAMPH
RRA[1:0]
RRDMPHB
RFCLK
OTSEN
Backward OAM
& Loopback Cells
E
load
D
IWRENB[1]
IDAT[7:0]
IPRTY[0]
3-to-N
decoder
Q
UTOPIA
LEVEL 2
ISOC
IFCLK
Single-PHY
or
Multi-PHY
interface to
switch
COMPLIANTIAVALID
1:0
INGRESS
4:2
TSOC
DEVICE IADDR[4:0]
TDAT[7:0]
ICA[1]
TXPRTY
TCAMPH
TWA[1:0]
D
Q
TWRMPHB
IMASTER
IPOLL
TFCLK
S/UNI-MPH
#N
N-to-1
mux
IBUS8
RSOC
RDAT[7:0]
RXPRTY
RCAMPH
RRA[1:0]
RRDMPHB
RFCLK
Example 3 shows N (where N is a number from 1 to 8) PM7344 S/UNI-MPH
devices used with UTOPIA Level 2 compliant ingress and egress devices.
The S/UNI-MPH supports PHY address polling by sampling the two least
significant address bits (RRA[1:0] and TWA[1:0]) and generating the cell
available status for the selected PHY entity. It also holds the last state of
RRA[1:0] and TWA[1:0] before the assertion of RRDMPHB and TWRMPHB,
respectively, thus latching the PHY address resolved by the polling process. The
only support logic is that required to select between the S/UNI-MPH devices.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
12
PMC [ PMC-SIERRA, INC ]
