PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 005H, 105H, 205H and 305H: Receive TS0 Data Link
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
SACE
SACI
RXSA4EN
RXSA5EN
RXSA6EN
RXSA7EN
RXSA8EN
X
0
0
1
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
R/W
These registers are used when the E1 format is selected to choose timeslot 16
or the required subset of timeslot 0 National bits that constitute the receive data
link.
SACE:
The SACE bit enables the generation of an interrupt whenever there is a
change in the National bits that are not extracted to form a data link.
Changes in the National bits are not debounced, i.e. the interrupt is
generated immediately when the current value of the National bits differs from
the previous value. The value of the National bits can be read in the FRMR
International/National Bits Register.
SACI:
The SACI bit is set to logic one whenever there is a change in the National
bits that are not extracted to form a data link. The SACI bit is cleared
following a read of this register.
RXSA4EN, RXSA5EN, RXSA6EN, RXSA7EN and RXSA8EN:
The RXSAxEN bits control the extraction of a data link from the received
Time Slot 0 National Use bits (Sa4 through Sa8).
If the RXDMASIG bit from the Datalink Options Register is a logic 1, the data
link bits are terminated by the internal HDLC receiver; otherwise, the data link
is presented on RDLSIG. If the RXSA4EN is logic 1, the RDLSIG value is
extracted from bit 4 of Time Slot 0 of non-frame alignment signal frames. If
the RXSA8EN is logic 1, the RDLSIG value is extracted from bit 8 of Time
Slot 0 of non-frame alignment signal frames. The other enable bits operate in
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
80
PMC [ PMC-SIERRA, INC ]
