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PM7344-RI 参数 Datasheet PDF下载

PM7344-RI图片预览
型号: PM7344-RI
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 4-Func, CMOS, PQFP128, 14 X 20 MM, 2.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MQFP-128]
分类和应用: 网络接口
文件页数/大小: 293 页 / 1101 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM7344 S/UNI-MPH  
DATA SHEET  
PMC-950449  
ISSUE 6  
MULTI-PHY USER NETWORK INTERFACE  
RUNI:  
When the T1 or E1 format is selected, the RUNI bit enables the interface to  
receive uni-polar digital data and line code violation indications on the  
multifunction pins RDP/RDD[x] and RDN/RLCV/ROH[x]. When RUNI is set to  
logic 1, the RDP/RDD[x] and RDN/RLCV/ROH[x] multifunction pins become  
the data and line code violation inputs, RDD[x] and RLCV[x], sampled on the  
selected RCLKI[x] edge. When RUNI is set to logic 0, the RDP/RDD[x] and  
RDN/RLCV/ROH[x] multifunction pins become the positive and negative  
pulse inputs, RDP[x] and RDN[x]. If RUNI is set to logic 1, the DCR bit in the  
CDRC Configuration Register must also be set to logic 1. The RUNI bit is  
ignored if either the J2 or Arbitrary framing formats are selected.  
RFALL:  
The RFALL bit enables the Receive Interface to sample the multifunction pins  
on the falling RCLKI[x] edge when clock recovery is disabled. When RFALL is  
set to logic 1, the interface is enabled to sample the RDP/RDD[x] and  
RDN/RLCV/ROH[x] inputs on the falling RCLKI[x] edge. When RFALL is set  
to logic 0, the interface is enabled to sample the inputs on the rising RCLKI[x]  
edge.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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