PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Pin Name
Type
Pin Function
No.
VSS_DC[3] Ground
VSS_DC[2]
115 DC Ground (VSS_DC[3:0]). These pins should
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53
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be connected to GND in common with
VSS_AC[2:0].
VSS_DC[1]
VSS_DC[0]
Notes on Pin Description:
1. VDD_DC[3:0] and VSS_DC[3:0] are the +5 V and ground connections,
respectively, for the core circuitry and the DC drive of the output pads of the
device. VDD_AC[2:0] and VSS_AC[2:0] are the +5 V and ground
connections, respectively, for the AC switching of the pad ring circuitry of the
device. These power supply connections must all be utilized and must all
connect to a common +5 V or ground rail, as appropriate. There is no low
impedance connection within the S/UNI-MPH between the core, and pad ring
supply rails. Failure to properly make these connections may result in
improper operation or damage to the device.
2. Inputs RSTB, TMS, TDI, TRSTB and ALE have integral pull-up resistors.
3. The TDLSIG/TDLINT[4:1] pins have integral pull-up resistors and default to
being inputs after a reset.
4. D[7:0], TCLKO[4:1], RCLKO, RDAT[7:0], RCA[4:1], RXPRTY, RSOC,
TCA[4:1], and the TCAMPH and RCAMPH bidirectionals have 4mA drive
capability. All other outputs and bidirectionals have 2mA drive capability.
5. All inputs and bidirectionals present minimum capacitive loading and operate
at TTL logic levels.
6. When an internal RFDL is enabled, the RDLINT[x] output goes high:
1) when the number of bytes specified in the RFDL Interrupt Status/Control
Register have been received on the data link,
2) immediately on detection of RFDL FIFO buffer overrun,
3) immediately on detection of end of message,
4) immediately on detection of an abort condition, or,
5) immediately on detection of the transition from receiving all ones to flags.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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