PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
Figure 35
- UTOPIA L2 Multi-PHY Receive Slave
1
2
3
4
5
6
7
8
9
10
Polling
Selection
RCLK
RADR[4:0]
1F
PHY-X
1F
PHY-Y
1F
PHY-X
1F
PHY-Z
1F
PHY-Z
1F
1 RCLK
PHY-X
1 RCLK
PHY-Y
1 RCLK
PHY-X
1 RCLK
PHY-Z
RCA
RDAT[m:0], RPRTY
RENB
PHY-Z
Data K-3
Data K-2
Data K-1
Data K
Data 0
Data 1
Data 2
Data K-
RSOC
13.3.4 UTOPIA L2 single-PHY Receive Slave Interface
Figure 36 gives an example of the functional timing of the receive interface when
configured as a single port UTOPIA L2 compliant slave. The interface responds
to the address that matches the DEVID specified in the RXAPS Configuration
register by asserting the RCA when it is capable of providing a complete cell. As
a result, the master selects the S/UNI-IMA-8 PHYs by presenting the PHY
address again during the last cycle RENB is high. Had not the device been
selected, RSOC, RDAT[m:0], and RPRTY would have remained high-impedance.
Figure 36 illustrates that a cell transfer may be paused by deasserting RENB.
The device is reselected by presenting the PHY’s address the last cycle RENB is
high to resume the transfer.
Figure 36
- UTOPIA L2 Single-PHY Receive Slave
16-bit Utopia L2 Single Address Slave
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Polling & Reselection
Selection
Back 2 Back Cell
RCLK
RADR[4:0]
1F
DEVID
1F
N+1
1F
DEVID
1F
N+2
1F
N+3
D(2)
1F
N+1
1F
N
1F
N+1
D(3)
1 RCLK
1 RCLK
N+1
D(n)
RCA
RDAT[m:0], RPRTY
RENB
DEVID
DEVID
D(n-3)
D(n-2)
PAUS
D(n-1)
D(0)
D(1)
D(n-1)
D(n)
D(0)
D(1)
D(2)
RSOC
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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