PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
01 – Link Table
10 – Reserved
11 – Reserved
LRWB:
The link indirect access control bit (LRWB) selects between a configure
(write) or interrogate (read) access to the RAM. Writing logic 0 to LRWB
triggers an indirect write operation. Data to be written is taken from the
Indirect Link Data registers. Writing logic 1 to LRWB triggers an indirect read
operation.
CBUSY:
The indirect access command bit (CBUSY) reports the progress of an indirect
access. CBUSY is set high to trigger an indirect access, and will stay high
until the access is complete. Once the access is complete, the CBUSY signal
is reset by the TSB. This register should be polled to determine when data
from an indirect read operation is available in the Indirect Data register or to
determine when a new indirect write operation may commence.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
