PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
Register 0x336 Interrupt Enable
Bit
15:1
0
Type
R
Function
Default
Reserved
Link FIFO Overflow Interrupt Enable
0
R/W
0
The interrupt enable bits control whether the corresponding interrupt source will
cause an interrupt on the INT output or will be masked.
Link FIFO Overflow Interrupt Enable
1) link FIFO overflow interrupts will be enabled.
0) link FIFO overflow interrupts are not enabled.
11.10 TX IDCC registers
Register 0x340: TXIDCC Indirect Link Access
Bit
Type
Function
Default
15
R
CBUSY
0
14
R/W
N/A
R/W
R/W
R/W
LRWB
Unused
LSEL[1:0]
Reserved
LADDR[2:0]
0
N/A
0
13:9
8:7
6:3
2:0
0
Writing to this register triggers an indirect channel register access.
LADDR [2:0]:
The indirect link address number (LADDR [2:0]) indicates the link to be
configured or interrogated in the indirect link access.
LSEL:
LSEL selects the RAM to interrogate or configure.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
252
PMC [ PMC-SIERRA, INC ]
