PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
BUSY
The indirect access status bit (BUSY) reports the progress of an indirect
access. BUSY is set high when this register is written to trigger an indirect
access, and will stay high until the access is complete. At which point, BUSY
will be cleared (low). Alternatively, BUSY will be set high when TCAS first
comes out of reset until the RAM has been initialized. This register should be
polled to determine either: (1) when data from an indirect read operation is
available in the Indirect Data register or (2) when a new indirect write
operation may commence. Any indirect operation that is initiated while BUSY
is still high will be corrupted.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
143