S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Bit
15
Name
Description
CC_Activate_End_to_E Enables Continuity Checking on end-to-end flows. If the ForceCC register
nd
bit is logic 0, then when no user or end-to-end CC cells are transmitted
over a 1.0 second (nominal) interval, an end-to-end CC OAM cell is
generated. The end-to-end CC cell is generated at an interval of one per
second (nominally). If the connection is an F4 OAM connection that is
being aggregated, then any cells transmitted on any of the constituent F5
connections are considered user cells.
If the ForceCC register bit is logic 1, then when the
CC_Activate_End_to_End bit is logic 1, an end-to-end CC cell will be
generated at an interval of once per second (nominally), regardless of the
flow of user cells. ITU-T I.610 9.2.1.1.2, 9.2.2.1.2.
14
FM_interrupt_enable
This bit enables the generation of segment and end-to-end AIS, RDI
Continuity Check, and OAM Failure alarm interrupts. If this bit is logic 1,
the S/UNI-ATLAS-3200 will assert OAM Failure and segment and end-to-
end AIS, RDI and Continuity Check interrupts, as required, regardless of
whether or not the S/UNI-ATLAS-3200 is a connection end-point (segment
or end-to-end) for the connection. This bit would typically be programmed
to logic 1 at segment or end-to-end-points only. If this bit is logic 0, no
alarm interrupts will be asserted, however, the Status field will reflect the
connection state.
13:6
5
Generated OAM Defect
Type [7:0]
The Defect Type bits determine the Defect Type that is inserted into AIS
cells generated due to the CC_AIS_RDI process, via per-PHY AIS, and via
the Send_AIS_End_to_End or Send_AIS_Segment bits, and into RDI cells
generated via the CC_AIS_RDI process, via per-PHY RDI generation, or
via the per-VC bits Send_RDI_End_To_End or Send_RDI_Segment.
The F4toF5OAM bit indicates whether or not an F5 (VCC) connection will
send AIS or RDI cells due to an associated F4 (VPC) connection being in
AIS alarm. This bit is only significant if the connection is an F5. When an
F4 (VPC) is terminated (i.e. there is an F4 connection end-point which is
associated with this F5 connection) at the S/UNI-ATLAS-3200, the F5
connections are switched. If the F4 receives AIS cells, then the F5
connections will send AIS and/or RDI cells once per second, carrying the
Defect Location and Defect Type contained in the received F4 AIS cells. If
F4toF5OAM is set to logic 0, then this process is disabled, and no F5 AIS
or RDI cells will be generated based on the condition of the associated F4.
F4toF5OAM
4
AUTO_RDI
The AUTO_RDI bit enables the generation of segment and end-to-end RDI
cells while in an AIS alarm or Continuity alarm state. If AUTO_RDI is logic
1, an RDI cell is transmitted (and looped from the Cell Processor to the
reverse cell stream) immediately upon the reception of the first AIS cell at a
flow end-point. (if the S/UNI-ATLAS-3200 is an end-to-end point for that
connection, an end-to-end RDI cell will be generated, if the S/UNI-ATLAS-
3200 is a segment end point, a segment RDI cell will be generated, and if
the S/UNI-ATLAS-3200 is both a segment and end-to-end point, both types
of RDI cells will be generated) and once per second thereafter until the AIS
state is exited. Similarly, if the CC_AIS_RDI bit is logic 1, RDI cells are
generated once per second if no user or CC cells have been received in
the last 3.5 +/- 0.5 seconds. RDI cells can also be transmitted if the
Send_RDI_segment and Send_RDI_end_to_end bits are set, or if the
PHYRDI register bits are set.
3
CC_AIS_RDI
If this bit is a logic 1, AIS or RDI cells are generated at one second
intervals upon the declaration of a CC_alarm (assuming AIS_alarm is not
also declared).
If the connection is not a segment or ETE end point, then ETE AIS will be
generated once per second on declaration of ETE CC alarm. If
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
87
PMC [ PMC-SIERRA, INC ]
