S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
2
Features
The S/UNI®- ATLAS-3200 device is a monolithic, single chip device that handles ATM Layer
functions for one direction including VPI/VCI address translation, cell appending, cell rate
policing, per-connection counting, and I.610-compliant OAM requirements for 64K VCs (virtual
connections). Two or more S/UNI-ATLAS-3200 devices can be cascaded to support additional
VCs. The device:
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Can be configured as an Ingress mode device or an Egress mode device.
Supports a full duplex 16-bit SCI-PHY™ Backwards Cell Interface Port that allows an
Ingress mode device and an Egress mode device to communicate and behave as a single bi-
directional device. The SCI-PHY port is a UTOPIA Level 2, non-polled, cell handshaking
interface that handles 64-byte extended cells with prepended routing information. This can
also be described as a 16-bit, 52 MHz UTOPIA Level 1 interface, with prepended routing
information.
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With its instantaneous transfer rate of 3200 Mbit/s, it supports a cell transfer rate of 5.68x106
cells/s (e.g. one STS-48c or four STS-12c streams).
When configured as an Ingress mode device:
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The Input interface supports a 32-bit 104 MHz UTOPIA Level 3 Link Layer (Master)
interface using Multi-PHY addressing with user-programmable weighted polling for up to
48 PHY queues on a single physical port. Extended ATM cell lengths of 52 to 64 bytes
are supported, with optional HEC/UDF, prepend, and postpend words. Mapping of
physical PHYs to logical PHYs is supported, to facilitate Automated Protection
Switching.
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The Output interface supports a 32-bit 104MHz UTOPIA Level 3 PHY Layer (Slave)
interface using Multi-PHY handshaking for up to 48 PHY sources. Extended ATM cell
lengths of 52 to 64 bytes are supported, with optional HEC/UDF, prepend, and postpend
words. A non-polled, direct mode is also supported for this interface.
Alternately, the Input Interface supports a 32-bit 104 MHz POS-PHY™ Level 3 Rx Link
Layer interface, capable of handling a mix of packets and ATM cells. Each of 48 PHY
queues on a single physical port must be set up to carry either packets or cells. Cells are
processed by S/UNI-ATLAS-3200, but packets are not processed and are buffered and
passed through transparently. In this case, the Output interface supports a 32-bit 104
MHz POS-PHY Rx PHY Layer interface.
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When configured as an Egress mode device:
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The Input interface supports a 32-bit 104 MHz UTOPIA level 3 PHY Layer (Slave)
interface using Multi-PHY handshaking for up to 48 PHY destinations. Extended ATM
cell lengths of 52 to 64 bytes are supported, with optional HEC/UDF, prepend, and
postpend words.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
25
PMC [ PMC-SIERRA, INC ]
