S/UNI®-ATLAS-3200 Telecom Standard Product Data Sheet
Preliminary
Register 0x022: MCIF Dropped Cells Counter
Bit
31:8
7:0
Type
Function
Unused
DCOUNT[7:0]
Default
X
X
R
This register provides a count of cells dropped due to parity errors or FIFO overflow.
DCOUNT[7:0]
A write to this register or the S/UNI-ATLAS-3200 Identity/Load Counts register loads this
register with the number of cells dropped by the OMCIF due FIFO overflow since the last
such write, and resets the internal counter to zero. The update is done in such a fashion that
no events are missed if a counter reset and a dropped cell occur simultaneously. During this
transfer, the TIP bit in the S/UNI-ATLAS-3200 Identity/Load Counts register will be logic 1.
The contents of this register are valid when the TIP bit returns to logic 0. If this register is not
polled regularly, the count value will saturate at 0xFF.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990553, Issue 4
175
PMC [ PMC-SIERRA, INC ]
