欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM73123-PI 参数 Datasheet PDF下载

PM73123-PI图片预览
型号: PM73123-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 8 LINK CES / DBCES AAL1 SAR [8 LINK CES/DBCES AAL1 SAR]
分类和应用:
文件页数/大小: 364 页 / 2908 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM73123-PI的Datasheet PDF文件第147页浏览型号PM73123-PI的Datasheet PDF文件第148页浏览型号PM73123-PI的Datasheet PDF文件第149页浏览型号PM73123-PI的Datasheet PDF文件第150页浏览型号PM73123-PI的Datasheet PDF文件第152页浏览型号PM73123-PI的Datasheet PDF文件第153页浏览型号PM73123-PI的Datasheet PDF文件第154页浏览型号PM73123-PI的Datasheet PDF文件第155页  
RELEASED  
PM73123 AAL1GATOR-8  
DATASHEET  
PMC-2000097  
ISSUE 2  
8 LINK CES/DBCES AAL1 SAR  
Table 9 Frequency Select – E1 Mode  
Freq Select  
M
N
Total # Cycles Frequency  
-128  
-127  
-126  
-125  
-124  
-123  
-122  
-121  
-120  
-119  
-4  
-3  
-2  
-1  
0
1
2
3
1135  
1134  
1133  
1132  
1131  
1130  
1129  
1128  
1127  
1126  
1012  
1011  
1010  
1009  
1008  
1007  
1006  
1005  
1004  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
1151  
1150  
1149  
1148  
1147  
1146  
1145  
1144  
1143  
1142  
2.0478140301  
2.0478153339  
2.0478166399  
2.0478179482  
2.0478192589  
2.0478205717  
2.0478218869  
2.0478232044  
2.0478245242  
2.0478258463  
1028  
1027  
1026  
1025  
1024  
1023  
1022  
1021  
1020  
2.0479934413  
2.0479950762  
2.0479967142  
2.0479983555  
2.0480000000  
2.0480016477  
2.0480032986  
2.0480049528  
2.0480066102  
4
109  
110  
111  
112  
124  
125  
126  
127  
899  
898  
897  
896  
896  
896  
896  
915  
914  
913  
912  
2.0482008175  
2.0482028818  
2.0482049507  
2.0482070240  
912  
912  
912  
912  
2.0482070240  
2.0482070240  
2.0482070240  
2.0482070240  
896  
* Note that the frequency synthesizers are limited internally to a freq select range  
of –128 to 112 in order to maintain a +/- 100 ppm range. The average increment  
in frequency is ~1.66 Hz.  
9.4 Processor Interface Block (PROCI)  
The microprocessor interface block provides normal and test mode registers, as  
well as memory mapped registers and the logic required to connect to the  
microprocessor interface. The normal mode registers and memory mapped  
registers are required for normal operation, and test mode registers are used to  
enhance the testability of the AAL1gator-8. A general memory map for the  
register set can be seen in the following four figures:  
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL  
151  
 复制成功!