PM73121ꢀAAL1gator II
Data Sheet
PMC-Sierra, Inc.
PMC-980620
,VVXHꢀꢁ
AAL1 SAR Processor
4.3 Pin Descriptions
4.3.1 UTOPIA Interface Signals
NOTE: Unless stated otherwise, the maximum output current (IMAX) is 4 mA.
Table 6. UTOPIA Interface Signals
ATM Mode
Signal
PHY Mode
Signal
Reset
Value*
Pin #
Type
Description
PHY_ENABLE
TATM_CLK
TATM_SOC
PHY_ENABLE
RPHY_CLK
RPHY_SOC
56
In
NA
PHY_ENABLE determines which UTOPIA mode the
UTOPIA interface is configured. When 0, the chip is
configured with an ATM layer UTOPIA interface and
when 1, the chip is configured with a PHY layer
UTOPIA interface. An internal pulldown resistor will
default the chip to the ATM layer mode if left
unconnected.
20
24
In
NA
ATM: Transmit UTOPIA ATM Layer Clock is the
synchronization clock input for synchronizing data
output on TATM_DATA.
PHY: Receive UTOPIA PHY Layer Clock is the
synchronization clock input for synchronizing data
output on RPHY_DATA.
Maximum frequency is 33 MHz.
Out
0(ATM) ATM: Transmit UTOPIA ATM Layer Start-Of-Cell is
Z(PHY) an active high signal asserted by the AAL1gator II
when TATM_DATA contains the first valid byte of
the cell.
PHY: Receive UTOPIA PHY Layer Start-Of-Cell is
an active high signal asserted by the AAL1gator II
when RPHY_DATA contains the first valid byte of
the cell. In SPHY mode, the AAL1gator II drives this
signal only in cycles following those with /RPHY_EN
asserted. In MPHY mode, the AAL1gator II drives
this signal only when the ATM layer has selected it
for a cell transfer.
Maximum output current (IMAX) = 8 mA.
TATM_DATA(7:4) RPHY_DATA(7:4) 25-28
TATM_DATA(3) RPHY_DATA(3) 30
TATM_DATA(2:0) RPHY_DATA(2:0) 32-34
Out
0(ATM) ATM: Transmit UTOPIA ATM Layer Data Bits 7 to 0
Z(PHY) form the byte-wide data driven to the PHY layer. Bit 0
is the Least Significant Bit (LSB). Bit 7 is the Most
Significant Bit (MSB) and should be transmitted first.
PHY: Receive UTOPIA PHY Layer Data Bits 7 to 0
form the byte-wide data driven to the ATM layer. In
SPHY mode, the AAL1gator II drives this bus only in
cycles following those with /RPHY_EN asserted. In
MPHY mode, the AAL1gator II drives this bus only
when the ATM layer has selected it for a cell transfer.
Bit 0 is the LSB. Bit 7 is the MSB and should be
transmitted first.
Maximum output current (IMAX) = 8 mA.
ꢇꢀ
PMC [ PMC-SIERRA, INC ]
