欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM73121-RI 参数 Datasheet PDF下载

PM73121-RI图片预览
型号: PM73121-RI
PDF下载: 下载PDF文件 查看货源
内容描述: AAL1分段重组处理器 [AAL1 Segmentation And Reassembly Processor]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 223 页 / 2148 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM73121-RI的Datasheet PDF文件第52页浏览型号PM73121-RI的Datasheet PDF文件第53页浏览型号PM73121-RI的Datasheet PDF文件第54页浏览型号PM73121-RI的Datasheet PDF文件第55页浏览型号PM73121-RI的Datasheet PDF文件第57页浏览型号PM73121-RI的Datasheet PDF文件第58页浏览型号PM73121-RI的Datasheet PDF文件第59页浏览型号PM73121-RI的Datasheet PDF文件第60页  
PM73121AAL1gator II  
Data Sheet  
PMC-Sierra, Inc.  
PMC-980620  
,VVXHꢀꢁ  
AAL1 SAR Processor  
3.3.2 Data Cell Generation  
If the TALP receives a request to send a CSD-scheduled data cell and there are no OAM cell  
requests pending, it will do so as soon as it is free. It will look up the predefined ATM header  
from the T_QUEUE_TBL (refer to section 7.6.8 “T_QUEUE_TBL” on page 134). It will then  
obtain a sequence number for that queue from memory, and a structure pointer if necessary. After  
these bytes are written to the TUTOPIA interface, the TALP will then go to the data and the sig-  
naling frame buffers, locate the data bytes for the correct channels, and write them in the correct  
order to the UTOPIA interface. This cell building process is described in more detail in the fol-  
lowing section.  
3.3.2.1 Header Construction  
The entire header is fixed per queue. Headers are maintained in the memory, one per queue. These  
headers include a Header Error Check (HEC) character for the fifth byte. The queue should be  
deactivated during header replacement to prevent cells from being constructed with incorrect  
header values. A queue can be paused by setting the SUPPRESS_TRANSMISSION bit in IDLE_  
CONFIG register. Emissions are still scheduled, just the transmissions are suppressed. For any  
cells that are suppressed, the T_SUPPRESSED_CELL_CNT is incremented.  
3.3.2.2 Payload Construction  
Payload construction is the most complex task the TALP circuit performs. The signaling require-  
ments define much of the process, which is as follows:  
1. The first byte of the payload is provided by a lookup into the T_QUEUE_TBL. This first byte  
consists of the CSI bit, a 3-bit sequence number, and a 4-bit sequence number protection field.  
The CSI bit is set depending on SRTS and pointer requirements. The sequence number is  
incremented every time a new cell is sent for the same VPI/VCI.  
2. If the line is in one of the two structured modes, a structure pointer is needed in one of the  
even-numbered cells. The TALP inserts structure pointers according to the following rules:  
Only one pointer is inserted in each 8-cell sequence.  
A pointer is inserted in the first possible even-numbered cell of every 8-cell sequence.  
A pointer value of 0 is inserted when the structure starts in the byte directly after the  
pointer itself.  
A pointer value of 93 is inserted when the end of the structure coincides with the end of  
the 93-octet block of AAL-user information.  
A dummy pointer value of 127 is inserted in cell number six if no start-of-structure or  
end-of-structure occurs within the 8-cell sequence.  
3. This algorithm supplies a constant number of structure pointers and, therefore, data bytes,  
regardless of the structure size. The pointer is inserted in the seventh byte location of the cell.  
To force the TALP to build a structure consisting of a single DS0 with no signaling nibble and  
ꢂꢈ  
 复制成功!