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PM73121-RI 参数 Datasheet PDF下载

PM73121-RI图片预览
型号: PM73121-RI
PDF下载: 下载PDF文件 查看货源
内容描述: AAL1分段重组处理器 [AAL1 Segmentation And Reassembly Processor]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 223 页 / 2148 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM73121AAL1gator II  
Data Sheet  
PMC-Sierra, Inc.  
PMC-980620  
,VVXHꢀꢁ  
AAL1 SAR Processor  
number of overruns  
number of pointer parity errors  
number of misinserted cells  
A SUPPRESS_TRANSMISSION bit has been added (refer to section “IDLE_CONFIG  
Word Format” on page 139) to temporarily disable transmission while continuing to  
schedule cells.  
Two new control bits have been added to allow queues on an SDF-MF line to be  
configured in SDF-FR mode. One bit (refer to “T_CHAN_NO_SIG” on page 136) is for  
the transmit direction, and one bit (refer to “R_CHAN_NO_SIG” on page 157) is for the  
receive direction. This is the same as setting up individual queues in SDF-FR mode.  
A new E1 mode has been added to allow a 24-frame multiframe instead of a 16-frame  
multiframe. In this mode, signaling is updated every 24 frames. When processing cells,  
the signaling data will appear after N × 24 bytes of data, where N is the number of DS0s in  
the queue.  
The SRTS code from the Field Programmable Gate Array (FPGA) has been incorporated  
into the chip for each line. There is also a clock multiplexer that enables the AAL1gator II  
to generate the TL_CLK based on either the RL_CLK, a nominal E1 or T1 clock, or a  
synthesized clock based on the received SRTS.  
The R_INCORRECT_SNP counter (refer to “R_INCORRECT_SNP Word Format” on  
page 158) has been changed to conform to the Circuit Emulation Service (CES) MIB. That  
is, all cells with an incorrect SNP will be counted, regardless of whether or not the SN was  
corrected.  
The R_SEQUENCE_ERR counter (refer to “R_SEQUENCE_ERR Word Format” on  
page 157) has been changed to conform to the CES MIB. That is, only transitions from the  
SYNC state to the OUT_OF_SEQUENCE state are counted, as specified in ITU-T  
Recommendation I.363.1.  
Both E1 and T1 lines can be supported at the same time.  
The scan string for the current scan order has changed.  
The following four pins have been added:  
PHY_ENABLE (refer to page 81)  
TPHY_ADDR (refer to page 83)  
RPHY_ADDR (refer to page 83)  
TLCLK_OUTPUT_EN (refer to page 87)  
The following software fields have been added or expanded:  
In the COMP_LIN_REG (refer to section 7.4.2 “COMP_LIN_REG” starting on  
page 125), added the following fields:  
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