PM73121ꢀAAL1gator II
Data Sheet
PMC-Sierra, Inc.
PMC-980620
,VVXHꢀꢁ
AAL1 SAR Processor
Receive Cell Interface Features
•
Provides an ATM-layer or PHY-layer 33 MHz UTOPIA interface. Both SPHY and
MPHY modes are supported.
•
•
•
•
•
Provides per-VC queues.
Provides per-VC CDV tolerance settings.
Provides per-VC partially filled cell length settings.
Provides a supervisory receive queue for OAM cells.
Verifies and corrects sequence numbers in accordance with ITU-T Recommendation
I.363.1.
•
•
Processes sequence numbers in accordance with the “Fast SN Algorithm”, as specified in
the ITU-T Recommendation I.363.1.
Maintains bit integrity through individual errored cells or up to six lost cells. Takes into
account pointer bytes.
•
•
•
During underruns, can output fixed, pseudorandom, or old data.
Provides processor interrupts for OAM cell receptions.
Provides a multiplexed interface to external receive Phase-Locked Loops (PLLs) for
SRTS clock recovery for unstructured modes or adaptive clock recovery.
Statistics Features
•
•
•
•
•
•
•
Counts invalid Cyclic Redundancy Check (CRC) values for sequence numbers.
Counts OAM cells and dropped OAM cells.
Counts data cells transmitted per VC.
Counts conditioned data cells transmitted per VC.
Counts cells not transmitted due to line resynchronization per VC.
Counts cells received, dropped, lost, or misinserted per VC.
Counts cells with incorrect Sequence Number (SN) or incorrect Sequence Number
Protection (SNP).
•
•
•
Counts underrun occurrences per VC.
Counts overrun occurrences per VC.
Counts pointer reframes and pointer parity errors per VC.
ꢁ
PMC [ PMC-SIERRA, INC ]
