PM73121ꢀAAL1gator II
Data Sheet
PMC-Sierra, Inc.
PMC-980620
,VVXHꢀꢁ
AAL1 SAR Processor
7.4.2 COMP_LIN_REG
Organization: 1 word
Base address: 1h
Type: Read/Write
Function: Stores the global configuration.
Format: Refer to the following table.
Field (Bits)
Description
Reserved
(15:14)
Initialize to 0.
Selects the VCI address range.
SHIFT_VCI
(13)
0
1
Will use VCI(7:0) as the queue number if VCI(8) = 1.
Will use VCI(11:4) as the queue number if VCI(12) = 1.
Reserved(CT)
(12)
Write with a 0 to maintain future software compatibility.
Write with a 0 to maintain future software compatibility.
Enables each line to operate in a different mode.
Not used
(11:7)
MIXED_MODE_EN
(6)
0
1
All lines use the mode defined by T1_MODE.
Device is in mixed mode. LINE_MODE bits are enabled in LIN_STR_
MODE register.
Initialize to the proper value.
Not used
(5)
Write with a 0 to maintain future software compatibility.
SPHY_EN
(4)
An active high signal that enables single PHY UTOPIA mode. This signal is valid only
when PHY_ENABLE input is tied high.
Not used
(3)
Write with a 0 to maintain future software compatibility.
UDF_HS
(2)
Line 0 is in the UDF-HS mode.
0
1
Disables the UDF-HS (T3/E3) mode.
Enables the UDF-HS (T3/E3) mode. If this mode is selected, the T_
QUEUE_TBL and R_QUEUE_TBL entry index 0 are used.
Initialize to the proper value.
Reserved
(1)
Initialize to 0.
T1_MODE
(0)
The device is in the T1 mode.
0
1
Device is in E1 mode.
Device is in T1 mode.
Initialize to the proper value.
NOTE: To operate lines in the device in UDF-ML mode, set the T1_MODE bit of this regis-
ter to 0 or to 1 as appropriate. This will allow other lines to operate in the desired T1
or E1 mode. Then, in the LIN_STR_MODE register (refer to section 7.4.3 “LIN_
STR_MODE” on page 126), set the FR_STRUCT field of each line to 10.
ꢀꢁꢄ
PMC [ PMC-SIERRA, INC ]
