PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
RSLC block, bipolar input signals must rise to 50% (for G.703 2048 kbit/s) of
their peak amplitude. This level is referred to as the Slicing Level. The threshold
criteria insures accurate pulse or mark recognition in the presence of noise.
The RSLC block relies on an external network for compliance to G.703 120 Ω
twisted pair or G.703 75 Ω coax. The RSLC block is configured via an off-chip
attenuator pad (see Fig. 4) to operate in one of two modes: terminating mode or
bridging mode.
For determining the value of the components in Figure 4, the following
constraints apply:
1. The receiver must match the line. ITU-T Recommendation G.703 specifies
the minimum return loss allowable:
Frequency range (kHz)
Return loss (dB)
51 to 102
12
18
14
102 to 2048
2048 to 3072
The following constraint maximizes return loss:
R Z
R
+
1
2
N 2
in
Z
=
0
(1)
where
Z
O
is the line characteristic impedance,
is the differential input impedance between the RAS
Zin
and REF input pins ( ≥ 10kΩ),
is the transformer turns ratio (device-side to line-side).
should be much smaller than Zin to decrease the return loss
N
The value of
R
2
sensitivity to the RSLC input impedance variability.
If Z is the terminating load (reflected through the transformer), then return
L
loss is:
−
ZL Z0
20 log
= −
LR
+
ZL Z0
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
212