PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
FIGURE 45- BACKPLANE RECEIVE OUTPUT TIMING DIAGRAM...............246
FIGURE 46- RECOVERED DATA OUTPUT TIMING DIAGRAM.....................247
FIGURE 47- TRANSMIT INTERFACE OUTPUT TIMING DIAGRAM..............248
FIGURE 48- TRANSMIT DATA LINK DMA INTERFACE OUTPUT TIMING
DIAGRAM.............................................................................................249
FIGURE 49- RECEIVE DATA LINK DMA INTERFACE OUTPUT TIMING
DIAGRAM.............................................................................................250
FIGURE 50- ANALOG RECEIVE DATA INPUT TIMING DIAGRAM................252
FIGURE 51- 68 PIN PLASTIC LEADED CHIP CARRIER (Q SUFFIX)...........255
FIGURE 52- 80 PIN COPPER LEADFRAME PLASTIC QUAD FLAT PACK (R
SUFFIX):...............................................................................................256
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
xi
PMC [ PMC-SIERRA, INC ]
