PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
LIST OF FIGURES
FIGURE 1 - ATM E1 AND DS1 USER NETWORK INTERFACE .......................7
FIGURE 2 - DS0 CROSS-CONNECT................................................................8
FIGURE 3 - 68 PIN PLCC (Q-SUFFIX):...........................................................13
FIGURE 4 - 80 PIN PQFP (R-SUFFIX):...........................................................14
FIGURE 5 - EXTERNAL ANALOG RECEIVE INTERFACE CIRCUIT .............42
FIGURE 6 - CDRC JITTER TOLERANCE .......................................................44
FIGURE 7 - BASIC FRAMING ALGORITHM FLOWCHART ...........................47
FIGURE 8 - DJAT JITTER TOLERANCE .........................................................57
FIGURE 9 - DJAT MINIMUM JITTER TOLERANCE VS. XCLK ACCURACY...58
FIGURE 10- DJAT JITTER TRANSFER............................................................59
FIGURE 11- EXTERNAL ANALOG TRANSMIT INTERFACE CIRCUIT ...........62
FIGURE 12- TRANSMIT TIMING OPTIONS.....................................................90
FIGURE 13- TS16 TRANSMIT DATALINK INTERFACE..................................193
FIGURE 14- TS0 TRANSMIT DATALINK INTERFACE....................................193
FIGURE 15- TS16 RECEIVE DATALINK INTERFACE....................................194
FIGURE 16- TS0 RECEIVE DATALINK INTERFACE......................................194
FIGURE 17- RECEIVE BACKPLANE INTERFACE ........................................195
FIGURE 18- RECEIVE COMPOSITE MULTIFRAME OUTPUT (BRXSMFP=1
AND BRXCMFP=1): .............................................................................196
FIGURE 19- RECEIVE OVERHEAD OUTPUT (ROHM=1):............................196
FIGURE 20- RECEIVE LINE DATA INTERFACE ............................................196
FIGURE 21- TRANSMIT BACKPLANE INTERFACE......................................197
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
