PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Indirect Register 0808H: PRGM Generator Timeslot Configuration Page
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Unused
Unused
X
X
0
0
X
X
0
0
0
0
1
0
0
X
0
0
R/W
R/W
Reserved
PRBS_ENA
Unused
Unused
R/W
R/W
R/W
R/W
R/W
R/W
W
Reserved
Reserved
S[1]
Bit 8
Bit 7
Bit 6
S[0]
Bit 5
PRBS_SEQB
B1E1_ENA
FORCE_ERR
Unused
Bit 4
Bit 3
Bit 2
Bit 1
R/W
R/W
INV_PRBS
Reserved
Bit 0
INV_PRBS:
Sets the generator to invert the PRBS before inserting it in the payload. When set high, the
PRBS bytes will be inverted; else they will be inserted unmodified.
FORCE_ERR:
The Force Error bit is used to force bit errors in the inserted pattern. When set high, the MSB
of the next byte will be inverted, inducing a single bit error. The register will clear itself when
the operation is complete. A read operation will always result in a logic ‘0’.
B1E1_ENA:
This bit enables the replacement of the B1 byte in the SONET/SDH frame, by a
programmable value. The E1 byte is replaced by the complement of the same value. When
B1E1_ENA is high, the B1 and E1 bytes are replaced in the frame; otherwise they go through
the PRGM unaltered.
PRBS_SEQB:
This bit enables the insertion of a PRBS sequence or a sequential pattern in the payload.
When high, the payload is filled with PRBS bytes. When low, a sequential pattern is inserted.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
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