PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
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DESCRIPTION
The PM5381 S/UNI-2488 SATURN User Network Interface is a monolithic integrated circuit that
implements SONET/SDH processing, ATM mapping and Packet over SONET mapping functions
at the STS-48 (STM-16-16c) 2488.32 Mbit/s rate.
The S/UNI-2488 receives SONET/SDH streams using a bit serial interface, recovers the clock
and data and processes section, line, and path overhead. The S/UNI-2488 performs framing (A1,
A2), de-scrambling, detects alarm conditions, and monitors section, line, and path bit interleaved
parity (B1, B2, B3), accumulating error counts at each level for performance monitoring purposes.
Line and path remote error indications (M1, G1) are also accumulated. The S/UNI-2488
interprets the received payload pointers (H1, H2) and extracts the synchronous payload envelope
which carries the received ATM cells or POS frames.
When used to implement an ATM UNI or NNI, the S/UNI-2488 frames to the ATM payload using
cell delineation. HCS error correction is provided. Idle/unassigned cells may be optionally
dropped. Cells are also dropped upon detection of an uncorrectable header check sequence
error. The ATM cell payloads are descrambled and are written to a 8-cell FIFO buffer. The
received cells are read from the FIFO using a 32-bit wide UTOPIA Level 3 (clocked up to 104
MHz) datapath interface. Counts of received ATM cell headers that are errored and uncorrectable
and those that are errored and correctable are accumulated independently for performance
monitoring purposes.
When used to implement packet transmission over a SONET/SDH link, the S/UNI-2488 extracts
Packet over SONET (POS) frames from the SONET/SDH synchronous payload envelope.
Frames are verified for correct construction and size. The control escape characters are
removed. The frame check sequence is optionally verified for correctness and the extracted
packets are placed in a receive FIFO. The received packets are read from the FIFO through a
32-bit POS-PHY Level 3 (clocked up to 104 MHz) system side interface. Valid and FCS errored
packet counts are provided for performance monitoring. The S/UNI-2488 Packet over SONET
implementation is flexible enough to support several link layer protocols, including HDLC, PPP
and Frame Relay.
The S/UNI-2488 transmits SONET/SDH streams using a bit serial interface. The S/UNI-2488
synthesizes the transmit clock from a 155.52MHz frequency reference and performs framing
pattern insertion (A1, A2), scrambling, alarm signal insertion, and creates section, line, and path
bit interleaved parity codes (B1, B2, B3) as required to allow performance monitoring at the far
end. Line and path remote error indications (M1, G1) are also inserted. The S/UNI-2488
generates the payload pointer (H1, H2) and inserts the synchronous payload envelope that
carries the ATM or POS frames. The S/UNI-2488 also supports the insertion of a large variety of
errors into the transmit stream, such as framing pattern errors, bit interleaved parity errors, and
illegal pointers, which are useful for system diagnostics and tester applications.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
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PMC [ PMC-SIERRA, INC ]
