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PM5381 参数 Datasheet PDF下载

PM5381图片预览
型号: PM5381
PDF下载: 下载PDF文件 查看货源
内容描述: SATURN用户网络接口,用于2488 Mbit / s的 [SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S]
分类和应用: 网络接口
文件页数/大小: 487 页 / 2424 K
品牌: PMC [ PMC-SIERRA, INC ]
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PMC-Sierra, Inc.  
PRELIMINARY  
PM5381 S/UNI-2488  
DATASHEET  
PMC-2000489  
ISSUE 1  
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S  
PLMEND:  
The payload label mismatch removal (PLMEND) bit controls the removal of a PLM-P defect  
when an UNEQ-P defect is declared. When PLMEND is set to logic 1, a PLM-P defect is  
terminated when an UNEQ-P defect is declared. When PLMEND is set to logic 0, a PLM-P  
defect is not terminated when an UNEQ-P defect is declared.  
This bit is only valid for RHPP STS-1/STM0 #1.  
PRDI10:  
The path remote defect indication detection (PRDI10) bit selects the path RDI and path ERDI  
persistence. When PRDI10 is set to logic 1, path RDI and path ERDI are accepted when the  
same pattern is detected in bits 5,6,7 of the G1 byte for ten consecutive frames. When  
PRDI10 is set to logic 0, path RDI and path ERDI are accepted when the same pattern is  
detected in bits 5,6,7 of the G1 byte for five consecutive frames.  
This bit is only valid for RHPP STS-1/STM0 #1.  
PBIPBLKACC:  
The path block BIP-8 errors accumulation (PBIPBLKACC) bit controls the accumulation of  
path BIP-8 errors. When PBIPBLKACC is set to logic 1, the path BIP-8 error accumulation  
represents block BIP-8 errors (a maximum of 1 error per frame). When PBIPBLKACC is set  
to logic 0, the path BIP-8 error accumulation represents BIP-8 errors (a maximum of 8 errors  
per frame).  
This bit is only valid for RHPP STS-1/STM0 #1.  
B3EBLK:  
The serial path block BIP-8 errors (B3EBLK) bit controls the indication of path BIP-8 errors on  
the B3E serial output. When B3EBLK is set to logic 1, B3E outputs block BIP-8 errors (a  
maximum of 1 error per frame). When B3EBLK is set to logic 0, B3E outputs BIP-8 errors (a  
maximum of 8 errors per frame).  
This bit is only valid for RHPP STS-1/STM0 #1.  
PREIBLK:  
The path block REI errors (PREIBLK) bit controls the extraction of path REI errors from the  
path status (G1) byte. When PREIBLK is set to logic 1, the extracted path REI errors are  
interpreted as block BIP-8 errors (a maximum of 1 error per frame). When PREIBLK is set to  
logic 0, the extracted path REI errors are interpret as BIP-8 errors (a maximum of 8 errors per  
frame).  
This bit is only valid for RHPP STS-1/STM0 #1.  
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use  
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