PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
PUNEQE:
The path payload unequipped interrupt enable (PUNEQE) bit controls the activation of the
interrupt (INTB) output. When PUNEQE is set to logic 1, the PUNEQI pending interrupt will
assert the interrupt (INTB) output. When PUNEQE is set to logic 0, the PUNEQI pending
interrupt will not assert the interrupt (INTB) output.
PPDIE:
The path payload defect indication interrupt enable (PPDIE) bit controls the activation of the
interrupt (INTB) output. When PPDIE is set to logic 1, the PPDI pending interrupt will assert
the interrupt (INTB) output. When PPDIE is set to logic 0, the PPDI pending interrupt will not
assert the interrupt (INTB) output.
PRDIE:
The path remote defect indication interrupt enable (PRDIE) bit controls the activation of the
interrupt (INTB) output. When PRDIE is set to logic 1, the PRDII pending interrupt will assert
the interrupt (INTB) output. When PRDIE is set to logic 0, the PRDII pending interrupt will not
assert the interrupt (INTB) output.
PERDIE:
The path enhanced remote defect indication interrupt enable (PERDIE) bit controls the
activation of the interrupt (INTB) output. When PERDIE is set to logic 1, the PERDII pending
interrupt will assert the interrupt (INTB) output. When PERDIE is set to logic 0, the PERDII
pending interrupt will not assert the interrupt (INTB) output.
COPERDIE:
The change of path enhanced remote defect indication interrupt enable (COPERDIE) bit
controls the activation of the interrupt (INTB) output. When COPERDIE is set to logic 1, the
COPERDII pending interrupt will assert the interrupt (INTB) output. When COPERDIE is set
to logic 0, the COPERDII pending interrupt will not assert the interrupt (INTB) output.
PBIPEE:
The path BIP-8 error interrupt enable (PBIPEE) bit controls the activation of the interrupt
(INTB) output. When PBIPEE is set to logic 1, the PBIPEI pending interrupt will assert the
interrupt (INTB) output. When PBIPEE is set to logic 0, the PBIPEI pending interrupt will not
assert the interrupt (INTB) output.
PREIEE:
The path REI error interrupt enable (PREIEE) bit controls the activation of the interrupt (INTB)
output. When PREIEE is set to logic 1, the PREIEI pending interrupt will assert the interrupt
(INTB) output. When PREIEE is set to logic 0, the PREIEI pending interrupt will not assert
the interrupt (INTB) output.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
212
PMC [ PMC-SIERRA, INC ]
