PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
declared when a 111 pattern is detected in bits 6,7,8 of the K2 byte for five consecutive
frames.
LRDI3:
The line remote defect indication detection (LRDI3) bit selects the Line RDI detection
algorithm. When LRDI3 is set to logic 1, Line RDI is declared when a 110 pattern is detected
in bits 6,7,8 of the K2 byte for three consecutive frames. When LRDI3 is set to logic 0, Line
RDI is declared when a 110 pattern is detected in bits 6,7,8 of the K2 byte for five consecutive
frames.
SBIPEACCBLK:
The section BIP error accumulation block (SBIPEACCBLK) bit controls the accumulation of
section BIP errors. When SBIPEACCBLK is set to logic 1, the section BIP accumulation
represents BIP-8 block errors (a maximum of 1 error per frame). When SBIPEACCBLK is set
to logic 0, the section BIP accumulation represents BIP-8 errors (a maximum of 8 errors per
frame).
LBIPEACCBLK:
The line BIP error accumulation block (LBIPEACCBLK) bit controls the accumulation of line
BIP errors. When LBIPEACCBLK is set to logic 1, the line BIP accumulation represents BIP-
24 block errors (a maximum of 1 error per STS-3/STM-1 per frame). When LBIPEACCBLK is
set to logic 0, the line BIP accumulation represents BIP-8 errors (a maximum of 8 errors per
STS-1/STM-0 per frame).
LREIBLK
The line REI block (LREIBLK) bit controls the extraction of line REI errors from the M1 byte.
When LREIBLK is set to logic 1, the extracted line REI are interpreted as block BIP-24 errors
(a maximum of 1 error per STS-3/STM-1 per frame). When LREIBLK is set to logic 0, the
extracted line REI are interpreted as BIP-8 errors (a maximum of 8 errors per STS-1/STM-0
per frame).
BUSY:
The BUSY (BUSY) bit reports the status of the transfer of section BIP, line BIP and line REI
error counters to the holding registers. BUSY is set to logic 1 upon writing to the holding
register addresses or by a low to high transition on LCK. BUSY is set to logic 0, upon
completion of the transfer. This bit should be polled to determine when new data is available
in the holding registers.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
137
PMC [ PMC-SIERRA, INC ]
