PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0003H: S/UNI-2488 Clock Monitors
Bit
Type
Function
Default
Bit 15
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
TCLKA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
RCLKA
RFCLKA
TFCLKA
REFCLKA
REFCLKA:
The REFCLK active (REFCLKA) bit monitors for low to high transitions on the REFCLK
reference clock input. REFCLKA is set high on a rising edge of REFCLK, and is set low
when this register is read.
TFCLKA:
The TFCLK active (TFCLKA) bit monitors for low to high transitions on the TFCLK transmit
FIFO clock input. TFCLKA is set high on a rising edge of TFCLK, and is set low when this
register is read.
RFCLKA:
The RFCLK active (RFCLKA) bit monitors for low to high transitions on the RFCLK receive
FIFO clock input. RFCLKA is set high on a rising edge of RFCLK, and is set low when this
register is read.
RCLKA:
The RCLK active (RCLKA) bit monitors for low to high transitions on the RCLK output.
RCLKA is set high on a rising edge of RCLK, and is set low when this register is read.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
102
PMC [ PMC-SIERRA, INC ]
