PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0006H: S/UNI-2488 Master Interrupt Status #3
Bit
Type
Function
Default
Bit 15
R/W
R
INTE[3]
Unused
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
Unused
R
TPRGMI[3]
TSVCAI[3]
Unused
R
R
R
RPRGMI[3]
SARCI[3]
RSVCAI[3]
Unused
R
R
R
R
Unused
R
Unused
R
RHPPI[3]
SBERI[3]
RTTPI[3]
RRMPI[3]
R
R
R
This register allows the source of an active interrupt to be identified down to the block level.
Further register accesses are required for the block in question to determine the cause of an
active interrupt and to acknowledge the interrupt source.
RRMPI[3]…TPRGMI[3]:
The RRMPI[3] to TPRGMI[3] are interrupt status indicators for the corresponding block. The
interrupt status is set to logic 1 to indicate a pending interrupt from the corresponding block.
The interrupt status bits are independent of the interrupt enable bit.
INTE[3]:
The interrupt enable (INTE[3]) bit controls the assertion of the interrupt (INTB) output. When
a logic 1 is written to INTE[3], the RRMP[3]…TPRGM[3] pending interrupt will assert the
interrupt (INTB) output. When a logic 0 is written to INTE[3], the RRMP[3]…TPRGM[3]
pending interrupt will not assert the interrupt (INTB) output.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
106
PMC [ PMC-SIERRA, INC ]
