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PM5380-BI 参数 Datasheet PDF下载

PM5380-BI图片预览
型号: PM5380-BI
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 440 页 / 2124 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM5380-BI的Datasheet PDF文件第82页浏览型号PM5380-BI的Datasheet PDF文件第83页浏览型号PM5380-BI的Datasheet PDF文件第84页浏览型号PM5380-BI的Datasheet PDF文件第85页浏览型号PM5380-BI的Datasheet PDF文件第87页浏览型号PM5380-BI的Datasheet PDF文件第88页浏览型号PM5380-BI的Datasheet PDF文件第89页浏览型号PM5380-BI的Datasheet PDF文件第90页  
S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet  
Released  
10.14 SONET/SDH Path Trace Buffer (SPTB)  
The SONET/SDH Section Trace Buffer (SPTB) block can handle both 64-byte CLLI messages  
in SONET and 16-byte E.164 messages in SDH. This block operates similarly to the  
SONET/SDH Section Trace Buffer (SSTB) except the C2 byte is also processed.  
10.14.1Receive Trace Message Receiver  
When TIMODE is low, the Trace Message Receiver (TMR) captures the received path trace  
identifier message (J1 byte) into microprocessor readable register. It contains three pages of  
trace message memory. They are the capture page, the accepted page and the expected page.  
Path trace identifier data bytes from the receive stream are written into the capture page. The  
expected identifier message is written by the microprocessor into the expected page.  
On receipt of a trace identifier byte, it is written into next location in the capture page. The  
received byte is compared with the data from the previous message in the capture page. An  
identifier message is accepted if it is received unchanged three times, or optionally, five times.  
The accepted message is then compared with the expected message. If the current message  
differs from the previous message for eight consecutive messages, the received message is  
declared unstable. The received message is declared stable when the received message passes  
the persistency criterion (three or five identical receptions) for being accepted. An interrupt  
may be optionally generated on entry to and exit from the unstable state.  
The length of the path trace identifier message is selectable between 16 bytes and 64 bytes.  
When programmed for 16 byte messages, the path trace buffer synchronizes to the byte with the  
most significant bit set to high and places the byte at the first location in the capture page.  
When programmed for 64 byte messages, the path trace buffer synchronizes to the trailing  
carriage return (CR = 0DH), line feed (LF = 0AH) sequence and places the next byte at the head  
of the capture page. This enables the path trace message to be appropriately aligned for  
interpretation by the microprocessor. Synchronization may be disabled, in which case, the  
memory acts as a circular buffer.  
When TIMODE is high, a stable message is declared when forty eight of the same path trace  
identifier message (J1) bytes are received. Once in the stable state, an unstable state is declared  
when one or more errors are detected in three consecutive sixteen byte windows.  
10.14.2Transmit Trace Buffer  
The Trace Transmit Buffer (TTB) sources the 16-byte or 64-byte trace identifier message. The  
TTB contains one page of transmit trace identifier message memory. Identifier message data  
bytes are written by the microprocessor into the message buffer and inserted in the transmit  
stream. When the microprocessor is updating the transmit page buffer, the TTB may be  
programmed to transmit null characters to prevent transmission of partial messages.  
10.14.3Overhead Byte Receiver  
The path signal label (PSL) found in the path overhead byte (C2) is processed. Two detection  
algorithms are implemented for the declaration of path signal label mismatch.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC- 2010299, Issue 2  
86  
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