S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
10.11.3FEBE Calculate
The FEBE Calculate Block accumulates far end block errors on a per frame basis, and inserts
the accumulated value (up to maximum value of eight) in the FEBE bit positions of the path
status (G1) byte. The FEBE information is derived from path BIP-8 errors detected by the
receive path overhead processor, RPOP. Far end block errors may be inserted under register
control for diagnostic purposes.
10.12 Transmit ATM Cell Processor (TXCP)
The Transmit ATM Cell Processor (TXCP) provides rate adaptation via idle/unassigned cell
insertion, provides HCS generation and insertion, and performs ATM cell scrambling. An idle
or unassigned cell is transmitted if a complete ATM cell has not been written into the transmit
FIFO.
10.12.1Idle/Unassigned Cell Generator
The Idle/Unassigned Cell Generator inserts idle or unassigned cells into the cell stream when
enabled. Registers are provided to program the GFC, PTI, and CLP fields of the idle cell header
and the idle cell payload. The idle cell HCS is automatically calculated and inserted.
10.12.2Scrambler
The Scrambler scrambles the 48 octet information field. Scrambling is performed using a
43
parallel implementation of the self-synchronous scrambler (x + 1 polynomial). The cell
headers are transmitted unscrambled, and the scrambler may optionally be disabled.
10.12.3HCS Generator
The HCS Generator performs a CRC-8 calculation over the first four header octets. A parallel
8
2
6
4
2
implementation of the polynomial, x +x +x+1, is used. The coset polynomial, x +x +x +1, is
added (modulo 2) to the residue. The HCS Generator optionally inserts the result into the fifth
octet of the header.
10.13 Transmit POS Frame Processor (TXFP)
The Transmit POS Frame Processor (TXFP) provides rate adaptation by transmitting flag
sequences (0x7E) between packets, provides FCS generation and insertion, performs packet
data scrambling, and provides performance monitoring functions.
10.13.1POS Frame Generator
The POS Frame Generator runs off of the SONET/SDH sequencer to create the POS frames to
be transmitted, whose format is shown in Figure 8. Flags are inserted whenever the Transmit
FIFO is empty and there is no data to transmit. When there is enough data to be transmitted, the
block operates normally; it removes packets from the Transmit FIFO and transmits them. In
addition, FCS generation, error insertion, byte stuffing, and scrambling can be optionally
enabled.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
83
PMC [ PMC-SIERRA, INC ]
