S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Pin Name
Type
Pin
No.
Function
TMOD[0]
TMOD[1]
Input
N30
The POS-PHY transmit word modulo (TMOD) signal
indicates the number of valid bytes of data on TDAT[31:0]
during POS-PHY operation.
N31
The value sampled on the TMOD[1:0] bus when TEOP is
sampled high specifics the number of valid byte of packet
data on TDAT[31:0].
TMOD[1:0] = "00"TDAT[31:0] valid
TMOD[1:0] = "01"TDAT[31:8] valid
TMOD[1:0] = "10"TDAT[31:16] valid
TMOD[1:0] = "11"TDAT[31:24] valid
TMOD[1:0] is considered valid only when TENB and TEOP
are simultaneously asserted.
TMOD is only used for POS-PHY operation and is ignored for
channels carrying ATM traffic when TEOP is high.
TMOD is sampled on the rising edge of TFCLK.
TSX
Input
M29
The POS-PHY transmit start of transfer (TSX) indicates when
the in-band port address is present on the TDAT[31:0] bus
during POS-PHY Level 3 operation.
When TSX and TENB are sampled high, the value sampled
on TDAT[7:0] is the address of the transmit PHY channel to
be selected. Subsequent data transfers on the TDAT[31:0]
bus will fill the channel FIFO buffer specified by this in-band
address.
The value sampled on TSX is considered valid only when
TENB is sampled high. TSX is only used for POS-PHY
operation. TSX must be tied low in UTOPIA Level 3
operation.
TSX is sampled on the rising edge of TFCLK.
TADR[0]
TADR[1]
TADR[2]
Input
P31
P30
P29
The UTOPIA transmit port address select (TADR[2:0]) is
used to select the channel whose FIFO fill status is to be
polled or the channel for which a UTOPIA cell transfer is
desired.
When TENB transitions from high to low, the value sampled
on TADR[2:0] selects the channel FIFO which the ATM cell is
written to. During all other conditions, the fill status of the
channel FIFO with the address sampled on TADR[2:0] is
reported on TCA on the following clock cycle.
TADR[2:0] is sampled on the rising edge of TFCLK.
The POS-PHY transmit port address select (TADR[2:0]) is
used to select the channel whose FIFO fill status is to be
polled.
The address sampled on TADR[2:0] specifies the channel
FIFO being polled. The PTPA output is updated on the
following clock cycle with the channel’s fill level based on the
programmable thresholds.
TADR[2:0] is sampled on the rising edge of TFCLK.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
50
PMC [ PMC-SIERRA, INC ]
