S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x068, 0x168, 0x268, 0x368, 0x468, 0x568, 0x668, 0x768:
RXCP Idle Cell Header Mask
Bit
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
MGFC[3]
MGFC[2]
MGFC[1]
MGFC[0]
MPTI[3]
MPTI[2]
MPTI[1]
MCLP
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
1
1
1
1
1
1
MGFC[3:0]:
The MGFC[3:0] bits contain the mask pattern for the first, second, third, and fourth bits of
the first octet of the 53-octet cell. This mask is applied to the Idle Cell Header Pattern
Register to select the bits included in the cell filter. A logic one in any bit position enables
the corresponding bit in the pattern register to be compared. A logic zero causes the
masking of the corresponding bit.
MPTI[3:0]:
The MPTI[3:0] bits contain the mask pattern for the fifth, sixth, and seventh bits of the
fourth octet of the 53-octet cell. This mask is applied to the Idle Cell Header Pattern
Register to select the bits included in the cell filter. A logic one in any bit position enables
the corresponding bit in the pattern register to be compared. A logic zero causes the
masking of the corresponding bit.
MCLP:
The CLP bit contains the mask pattern for the eighth bit of the fourth octet of the 53-octet
cell. This mask is applied to the Idle Cell Header Pattern Register to select the bits included
in the cell filter. A logic one in this bit position enables the MCLP bit in the pattern register
to be compared. A logic zero causes the masking of the MCLP bit.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
228
PMC [ PMC-SIERRA, INC ]
