S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
List of Figures
Figure 1 Typical STS-3c/STM-1 ATM Switch Port Application ................................................. 34
Figure 2 Typical STS-3c/STM-1 Packet over SONET/SDH Application................................... 35
Figure 3 Typical STS-3c/STM-1 S/UNI-8x155 Jitter Tolerance ................................................ 67
Figure 4 Pointer Interpretation State Diagram .......................................................................... 72
Figure 5 Cell Delineation State Diagram................................................................................... 76
Figure 6 Packet Over SONET/SDH Frame Format .................................................................. 78
Figure 7 CRC Decoder.............................................................................................................. 79
Figure 8 Packet Over SONET/SDH Frame Format .................................................................. 84
Figure 9 CRC Generator ........................................................................................................... 85
Figure 10 WANS PLL Block Diagram........................................................................................ 89
Figure 11 Input Observation Cell (IN_CELL) .......................................................................... 377
Figure 12 Output Cell (OUT_CELL) ........................................................................................ 378
Figure 13 Bidirectional Cell (IO_CELL) ................................................................................... 378
Figure 14 Layout of Output Enable and Bidirectional Cells..................................................... 379
Figure 15 ATM Mapping into the STS-3c/STM-1 SPE............................................................ 380
Figure 16 POS Mapping into the STS-3c/STM-1 SPE............................................................ 380
Figure 17 APS Mapping into the STS-12/STM-4 SPE............................................................ 381
Figure 18 STS-3c/STM-1 Overhead........................................................................................ 382
Figure 19 32-bit Wide, 52 Byte ATM Cell Structure ................................................................ 385
Figure 20 32-bit wide, 56 Byte ATM Cell Structure................................................................. 385
Figure 21 32-bit wide, 109 Byte Packet Data Structure .......................................................... 386
Figure 22 Clocking Structure................................................................................................... 391
Figure 23 Line Loopback Mode............................................................................................... 393
Figure 24 Serial Diagnostic Loopback Mode .......................................................................... 394
Figure 25 Parallel Diagnostic Loopback Mode........................................................................ 394
Figure 26 Path Diagnostic Loopback Mode ............................................................................ 395
Figure 27 Data Diagnostic Loopback Mode ............................................................................ 395
Figure 28 Channel APS Structure........................................................................................... 396
Figure 29 Transmit APS Link .................................................................................................. 397
Figure 30 Receive APS Link ................................................................................................... 397
Figure 31 Boundary Scan Architecture ................................................................................... 400
Figure 32 TAP Controller Finite State Machine....................................................................... 401
Figure 33 Power Supply Filtering and Decoupling.................................................................. 405
Figure 34 Interfacing S/UNI-8x155 Line PECL Pins to 3.3V Devices..................................... 407
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
20
PMC [ PMC-SIERRA, INC ]
