S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x0EA, 0x1EA, 0x2EA, 0x3EA, 0x4EA, 0x5EA, 0x6EA, 0x7EA: RASE
SF Clearing Threshold LSB ................................................................................................ 290
Register 0x0EB, 0x1EB, 0x2EB, 0x3EB, 0x4EB, 0x5EB, 0x6EB, 0x7EB: RASE
SF Clearing Threshold MSB ............................................................................................... 290
Register 0x0EC, 0x1EC, 0x2EC, 0x3EC, 0x4EC, 0x5EC, 0x6EC, 0x7EC: RASE
SD Accumulation Period LSB ............................................................................................. 291
Register 0x0ED, 0x1ED, 0x2ED, 0x3ED, 0x4ED, 0x5ED, 0x6ED, 0x7ED: RASE
SD Accumulation Period..................................................................................................... 291
Register 0x0EE, 0x1EE, 0x2EE, 0x3EE, 0x4EE, 0x5EE, 0x6EE, 0x7EE: RASE
SD Accumulation Period MSB ............................................................................................ 292
Register 0x0EF, 0x1EF, 0x2EF, 0x3EF, 0x4EF, 0x5EF, 0x6EF, 0x7EF: RASE
SD Saturation Threshold LSB............................................................................................. 293
Register 0x0F0, 0x1F0, 0x2F0, 0x3F0, 0x4F0, 0x5F0, 0x6F0, 0x7F0: RASE SD
Saturation Threshold MSB.................................................................................................. 293
Register 0x0F1, 0x1F1, 0x2F1, 0x3F1, 0x4F1, 0x5F1, 0x6F1, 0x7F1: RASE SD
Declaring Threshold LSB.................................................................................................... 294
Register 0x0F2, 0x1F2, 0x2F2, 0x3F2, 0x4F2, 0x5F2, 0x6F2, 0x7F2: RASE SD
Declaring Threshold MSB................................................................................................... 294
Register 0x0F3, 0x1F3, 0x2F3, 0x3F3, 0x4F3, 0x5F3, 0x6F3, 0x7F3: RASE SD
Clearing Threshold LSB...................................................................................................... 295
Register 0x0F4, 0x1F4, 0x2F4, 0x3F4, 0x4F4, 0x5F4, 0x6F4, 0x7F4: RASE SD
Clearing Threshold MSB..................................................................................................... 295
Register 0x0F5, 0x1F5, 0x2F5, 0x3F5, 0x4F5, 0x5F5, 0x6F5, 0x7F5: RASE
Receive K1.......................................................................................................................... 296
Register 0x0F6, 0x1F6, 0x2F6, 0x3F6, 0x4F6, 0x5F6, 0x6F6, 0x7F6: RASE
Receive K2.......................................................................................................................... 297
Register 0x0F7, 0x1F7, 0x2F7, 0x3F7, 0x4F7, 0x5F7, 0x6F7, 0x7F7: RASE
Receive Z1/S1 .................................................................................................................... 298
Register 0x0FC, 0x1FC, 0x2FC, 0x3FC, 0x4FC, 0x5FC, 0x6FC, 0x7FC:
Channel Concatenation Status and Enable........................................................................ 299
Register 0x0FD, 0x1FD, 0x2FD, 0x3FD, 0x4FD, 0x5FD, 0x6FD, 0x7FD:
Channel Concatenation Interrupt Status............................................................................. 300
Register 0x0FE, 0x1FE, 0x2FE, 0x3FE, 0x4FE, 0x5FE, 0x6FE, 0x7FE:
Channel Serial Interface Configuration............................................................................... 301
Register 0x0FF, 0x1FF, 0x2FF, 0x3FF, 0x4FF, 0x5FF, 0x6FF, 0x7FF: Channel
Clock Monitors .................................................................................................................... 302
Register 0x1000: S/UNI-8x155 Clock Source Configuration.................................................... 303
Register 0x1001: S/UNI-8x155 DCC Interface Configuration .................................................. 304
Register 0x1004: APS Configuration and Status ..................................................................... 305
Register 0x1005: APS FIFO Configuration and Status............................................................ 307
Register 0x1006: APS Interrupt Status #1 ............................................................................... 308
Register 0x1008: APS Reset Control....................................................................................... 309
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
17
PMC [ PMC-SIERRA, INC ]
