S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x03C, 0x13C, 0x23C, 0x33C, 0x43C, 0x53C, 0x63C, 0x73C:
RPOP RDI
Bit
Type
Function
Unused
Unused
Reserved
BLKFEBE
Unused
Reserved
ARDIE
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
0
0
X
0
0
X
R/W
R/W
R/W
R/W
R
ARDIV
ARDIV:
The auxiliary RDI bit (ARDIV) reports the current state of the path auxiliary RDI within the
receive path overhead processor.
ARDIE:
When a logic one is written to the ARDIE interrupt enable bit position, an interrupt is
generated when a change in the path auxiliary RDI state occurs. This interrupt is indicated
by the PRDII bit (Register 0x031 (EXTD=0); RPOP Interrupt Status, Bit 2).
BLKFEBE:
When set high, the block FEBE bit (BLKFEBE) causes path FEBE errors to be reported and
accumulated on a block basis. A single path FEBE error is accumulated for a block if the
received FEBE code for that block is between 1 and 8 inclusive. When BLKFEBE is set
low, path FEBE errors are accumulated on a error basis.
Reserved:
The reserved bits must be programmed to logic zero for proper operation.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
187
PMC [ PMC-SIERRA, INC ]
