S/UNI®-8x155 ASSP Telecom Standard Product Data Sheet
Released
Register 0x019, 0x119, 0x219, 0x319, 0x419, 0x519, 0x619, 0x719:
RLOP Interrupt Enable/Interrupt Status
Bit
Type
R/W
R/W
R/W
R/W
R
R
R
R
Function
FEBEE
BIPEE
LAISE
LRDIE
FEBEI
BIPEI
Default
0
0
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
X
X
X
X
LAISI
LRDII
LRDII:
The LRDII bit is the remote defect indication interrupt status bit. LRDII is set high when a
change in the line RDI state occurs. This bit is cleared when this register is read.
LAISI:
The LAISI bit is the line AIS interrupt status bit. LAISI is set high when a change in the
line AIS state occurs. This bit is cleared when this register is read.
BIPEI:
The BIPEI bit is the line BIP-24 interrupt status bit. BIPEI is set high when a line layer
(B2) bit error is detected. This bit is cleared when this register is read.
FEBEI:
The FEBEI bit is the line far end block error interrupt status bit. FEBEI is set high when a
line layer FEBE (M1) is detected. This bit is cleared when this register is read.
LRDIE:
The LRDIE bit is an interrupt enable for the line remote defect indication alarm. When
LRDIE is set to logic one, an interrupt is generated when the line RDI state changes.
LAISE:
The LAISE bit is an interrupt enable for line AIS. When LAISE is set to logic one, an
interrupt is generated when line AIS changes state.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC- 2010299, Issue 2
150
PMC [ PMC-SIERRA, INC ]
