PM5371TUDX
DATA SHEET
PMC-920525
ISSUE 6
SONET/SDH TRIBUTARY UNIT CROSS CONNECT
Register 05H: Parity Error Interrupt Enable
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
Unused
TPERE
BPERE
LPERE
RPERE
X
X
X
X
0
0
0
0
R/W
R/W
R/W
R/W
This register is used to enable parity errors to generate interrupts.
RPERE, LPERE, BPERE, TPERE:
These bits enable parity errors on their respective input buses to generate
interrupts. When high, parity error interrupt generation is enabled. When low,
parity error interrupt generation is disabled, however, the parity error
indications may still be polled. The RPERE bit configures the SINR bus, the
LPERE bit configures the SINL bus, the BPERE bit configures the DINB bus,
and the TPERE bit configures the DINT bus.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
36
PMC [ PMC-SIERRA, INC ]
