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PM5365-PI 参数 Datasheet PDF下载

PM5365-PI图片预览
型号: PM5365-PI
PDF下载: 下载PDF文件 查看货源
内容描述: VT / TU映射器和M13多路复用器 [VT/TU MAPPER AND M13 MULTIPLEXER]
分类和应用: 复用器
文件页数/大小: 244 页 / 1139 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM5365 TEMAP  
DATASHEET  
PMC-1991148  
ISSUE 3  
HIGH DENSITY VT/TU MAPPER  
AND M13 MULTIPLEXER  
Figure 47: Telecom DROP Bus Timing - AU4 VC  
LREFCLK  
LDC1J1  
••••  
LDPL  
LDV5  
INVALID  
INVALID  
LDTPL  
[7:0]  
LDDATA  
A1 A2 A2 A2 C1  
X
X
V5  
Z7  
J1  
NPNP NP  
V1 V1 V1  
J1 byte VC4  
First NPI byte TUG3 #1  
National bytes  
V5 byte TUG3 #1  
Z7 byte TUG3 #1  
V1 byte TU #1,  
TUG2#1, TUG3 #1  
The LDV5 and LDTPL signals are optional when using the ingress VTPP within  
the TEMAP which will regenerate the LDV5 and LDTPL signals from LDC1J1V1,  
LDPL and the pointers within LDDATA[7:0]. In order to bypass the ingress VTPP,  
the position of the single J1 byte and the VC4 is implicitly defined by the C1 byte  
position. In the locked AU4 mode, the VC4 is defined to be aligned to the AU4  
transport envelope such that the J1 byte occupies the first available payload byte  
after the C1 byte, and no pointer justifications are possible.  
13.4 Telecom ADD Bus Interface Timing  
Figure 48 shows the function of the telecom ADD bus signals in AU3 mode.  
Data on LADATA[7:0] is updated on the rising edge of LREFCLK. The LAC1  
input is sampled on the rising edge of LREFCLK and aligns all devices on the  
ADD bus by marking the first C1 byte of the first STS-1 in every fourth STS-3  
transport envelope. LAC1 pulses every fourth STS-3 to indicate tributary  
multiframe alignment on the ADD bus. The bytes forming the three STS-1  
synchronous payload envelopes are identified when the LAPL signal is high. The  
LAC1J1V1 signal pulses high, while LAPL is set low, to mark the C1 byte of the  
first STS-1 in every frame of the STS-3 transport envelope. The LAC1J1V1  
signal is high when the LAPL signal is high to mark every J1 byte of each of the  
three STS-1 SPEs. The three STS-1 SPEs are fixed at two different alignments  
to the STS-3 transport envelope. The first is shown in Figure 48 in which the J1  
bytes follow immediately after the C1 bytes. The second alignment is at SPE  
pointer location zero where the J1 bytes follow immediately after the H3 bytes.  
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use  
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