STANDARD PRODUCT
PM5365 TEMAP
DATASHEET
PMC-1991148
ISSUE 3
HIGH DENSITY VT/TU MAPPER
AND M13 MULTIPLEXER
Table 31: Repetitive Pattern Generation (PS bit = 1)
Pattern Type
TR LR IR#1 IR#2 IR#3 IR#4 TINV RINV
All ones
All zeros
Alternating ones/zeros
Double alternating
ones/zeros
00 00
00 00
00 01
00 03
FF
FE
FE
FC
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
0
0
0
0
0
0
0
0
3 in 24
1 in 16
1 in 8
1 in 4
Inband loopback activate
Inband loopback
deactivate
00 17
00 0F
00 07
00 03
00 04
00 02
22
01
01
F1
F0
FC
00
00
FF
FF
FF
FF
20
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
0
0
0
0
0
0
0
0
0
0
0
0
Notes for the Pseudo Random and Repetitive Pattern Generation Tables
1. The PS bit and the QRSS bit are contained in the PRGD Control register
2. TR = PRGD Tap Register
3. LR = PRGD Length Register
4. IR#1 = PRGD Pattern Insertion #1 Register
5. IR#2 = PRGD Pattern Insertion #2 Register
6. IR#3 = PRGD Pattern Insertion #3 Register
7. IR#4 = PRGD Pattern Insertion #4 Register
8. The TINV bit and the RINV bit are contained in the PRGD Control register
12.10 JTAG Support
The TEMAP supports the IEEE Boundary Scan Specification as described in the
IEEE 1149.1 standards. The Test Access Port (TAP) consists of the five
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