欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM5365-PI 参数 Datasheet PDF下载

PM5365-PI图片预览
型号: PM5365-PI
PDF下载: 下载PDF文件 查看货源
内容描述: VT / TU映射器和M13多路复用器 [VT/TU MAPPER AND M13 MULTIPLEXER]
分类和应用: 复用器
文件页数/大小: 244 页 / 1139 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM5365-PI的Datasheet PDF文件第174页浏览型号PM5365-PI的Datasheet PDF文件第175页浏览型号PM5365-PI的Datasheet PDF文件第176页浏览型号PM5365-PI的Datasheet PDF文件第177页浏览型号PM5365-PI的Datasheet PDF文件第179页浏览型号PM5365-PI的Datasheet PDF文件第180页浏览型号PM5365-PI的Datasheet PDF文件第181页浏览型号PM5365-PI的Datasheet PDF文件第182页  
STANDARD PRODUCT  
PM5365 TEMAP  
DATASHEET  
PMC-1991148  
ISSUE 3  
HIGH DENSITY VT/TU MAPPER  
AND M13 MULTIPLEXER  
Table 22: DS3 Clock Rate Encoding  
ClkRate[1:0]  
DS3 Clocks / 2KHz  
“00” – Nominal  
“01” – Fast  
“1x” – Slow  
22368  
22372  
22364  
SBI Alarms  
The TEMAP transfers alarm conditions across the SBI bus for T1 and E1  
tributaries. The TEMAP does not support alarm conditions across the SBI bus for  
DS3 nor transparent VTs.  
Table 19 show the alarm indication bit, ALM, as bit 7 of the Link Rate Octet.  
Devices connecting to the TEMAP which do not support alarm indications must  
set this bit to 0 on the SBI ADD bus.  
The presence of an alarm condition is indicated by the ALM bit set high in the  
Link Rate Octet. The absence of an alarm condition is indicated by the ALM bit  
set low in the Link Rate Octet. In the egress direction the TEMAP can be  
configured to use the alarm bit to force AIS on a per link basis.  
T1 Tributary Mapping  
Table 23 shows the format for mapping 84 T1s within the SPE octets. Clear  
channel bits within each T1 are easily located within this mapping. The V1, V2  
and V4 octets are not used to carry T1 data and are either reserved or used for  
control across the interface. When enabled, the V4 octet is the Link Rate octet of  
Tables 1 and 3. It carries alarm and clock phase information across the SBI bus.  
The V1 and V2 octets are unused and should be ignored by devices listening to  
the SBI bus. The V5 and R octets do not carry any information and are fixed to a  
zero value. The V3 octet carries a T1 data octet but only during rate adjustments  
as indicated by the V5 indicator signals, DV5 and AV5, and payload signals,  
SDPL and SAPL.  
The V1, V2, V3 and V4 octets are fixed to the locations shown. All the other  
octets, shown shaded for T1#1,1, float within the allocated columns maintaining  
the same order and moving a maximum of one octet per 2KHz multi-frame. The  
position of the floating T1 is identified via the V5 Indicator signals, SDV5 and  
SAV5, which locate the V5 octet. When the T1 tributary rate is faster than the  
SBI nominal T1 tributary rate, the T1 tributary is shifted ahead by one octet which  
is compensated by sending an extra octet in the V3 location. When the T1  
tributary rate is slower than the nominal SBI tributary rate the T1 tributary is  
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use  
167  
 复制成功!