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PM5365-PI 参数 Datasheet PDF下载

PM5365-PI图片预览
型号: PM5365-PI
PDF下载: 下载PDF文件 查看货源
内容描述: VT / TU映射器和M13多路复用器 [VT/TU MAPPER AND M13 MULTIPLEXER]
分类和应用: 复用器
文件页数/大小: 244 页 / 1139 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM5365 TEMAP  
DATASHEET  
PMC-1991148  
ISSUE 3  
HIGH DENSITY VT/TU MAPPER  
AND M13 MULTIPLEXER  
1,28  
2,28  
3,28  
34,62,90  
100,184,268  
101,185,269  
102,186,270  
34,62,90  
34,62,90  
Table 18  
E1#  
- E1/TVT2 Tributary Column Numbering  
SPE1 Column SPE2 Column SPE3 Column  
SBI Column  
1,1  
2,1  
3,1  
1,2  
2,2  
SSS  
7,28,49,70  
7,28,49,70  
7,28,49,70  
8,29,50,71  
8,29,50,71  
19,82,145,208  
20,83,146,209  
21,84,147,210  
22,85,148,211  
23,86,149,212  
1,21  
2,21  
3,21  
27,48,69,90  
27,48,69,90  
27,48,69,90  
79,142,205,268  
80,143,206,269  
81,144,207,270  
SBI Timing Master Modes  
The TEMAP supports asynchronous SBI timing modes. Asynchronous modes  
allow T1, E1, DS3 and transparent tributaries to float within the SBI structure to  
accommodate differences in timing.  
In Asynchronous modes timing is communicated across the Scaleable  
Bandwidth Interconnect by floating data structures within the SBI. Payload  
indicator signals in the SBI control the position of the floating data structure and  
therefore the timing. When sources are running faster than the SBI the floating  
payload structure is advanced by an octet be passing an extra octet in the V3  
octet locations (H3 octet for DS3 mappings). When the source is slower than the  
SBI bus, the floating payload is retarded by leaving the octet after the V3 or H3  
octet unused. Both these rate adjustments are indicated by the SBI control  
signals.  
Transparent VTs (TVTs) can float in the SBI structure in two ways. The first  
method uses valid V1 and V2 pointers to indicate positive and negative pointer  
justifications. The second methods uses the SBI signals SDV5, SAV5, SDPL and  
SAPL to indicate rate adjustments. In the DROP bus the TEMAP will always  
provide both valid pointers with valid SDV5 and SDPL signals. On the SBI Add  
Bus the TEMAP needs to be configured on a per tributary basis for either  
transparent VT mode. Transparent VT operation is configured on a per tributary  
basis via the ETVT and ETVTPTRDIS bits in the TTMP Tributary control  
registers. Note that the SC1FPEN bit in Register 1209H (SONET/SDH Master  
DS3 Clock Generation Control) must be set appropriately for TVT mode.  
Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use  
164  
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