PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
LIST OF TABLES
TABLE 1 - PATH SIGNAL LABEL MISMATCH STATE..............................102
TABLE 2 - REGISTER MEMORY MAP.....................................................107
TABLE 3 - TEST MODE REGISTER MEMORY MAP...............................325
TABLE 4 - INSTRUCTION REGISTER (LENGTH – 3 BITS) ....................364
TABLE 5 -IDENTIFICATION REGISTER ..................................................365
TABLE 6 BOUNDARY SCAN REGISTER (LENGTH – 218 BITS)............365
TABLE 7 -TUPP+622 ABSOLUTE MAXIMUM RATINGS .............................408
TABLE 8 -TUPP+622 D.C. CHARACTERISTICS.........................................409
TABLE 9 - MICROPROCESSOR INTERFACE READ ACCESS...............412
TABLE 10 - MICROPROCESSOR INTERFACE WRITE ACCESS.............416
TABLE 11 - TUPP+622 INPUT TIMING FOR SCLK (FIGURE 34) .............420
TABLE 12 - TUPP+622 INPUT TIMING HSCLK (FIGURE 34) ...................421
TABLE 13 - TUPP+622 STREAM OUTPUT................................................424
TABLE 14 - TUPP+622 PATH OVERHEAD OUTPUT (FIGURE 36)...........426
TABLE 15 - JTAG PORT INTERFACE (FIGURE 37)..................................428
TABLE 16 - ORDERING INFORMATION....................................................431
TABLE 17 - THERMAL INFORMATION – THETA JC..................................431
TABLE 18 - MAXIMUM JUNCTION TEMPERATURE.................................431
TABLE 19 - THERMAL INFORMATION – THETA JA VS.
AIRFLOW 432
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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