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PM5363-BI 参数 Datasheet PDF下载

PM5363-BI图片预览
型号: PM5363-BI
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH支路单元荷载处理器, 622兆比特/ s接口 [SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 459 页 / 3435 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM5363 TUPP+622  
TUPP+622  
DATASHEET  
PMC-1981421  
ISSUE 4  
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S  
INTERFACES  
Provides low maximum tributary processing delay of 33 µs for VT1.5, 25 µs  
for VT2, 17 µs for VT3, and 9 µs for VT6 streams.  
Verifies parity on the IC1J1 and IPL signals and on the incoming data stream  
and generates parity on the outgoing data stream.  
May be used for multiframe synchronization or ring closure at the head-end  
node of a SONET/SDH ring.  
Operates in conjunction with the PM5313 SPECTRA-622 SONET/SDH  
Payload Extractor/Aligner For 622 Mbit/s or the PM5342 SPECTRA-155  
SONET/SDH Payload Extractor/Aligner to align tributaries such that they can  
be switched by the PM5371 TUDX SONET/SDH Tributary Unit Cross-  
Connect. Provides backwards compatibility with the PM5362 TUPP  
SONET/SDH Tributary Unit Payload Processor / Performance Monitor.  
Independently configurable incoming and outgoing interfaces that operate in  
the19.44 MHz STM-1 (STS-3) or the 77.76 MHz STM-4 (STS-12) byte  
interface modes.  
Provides a generic 8-bit microprocessor bus interface for configuration,  
control, and status monitoring.  
Provides a standard 5 signal IEEE P1149.1 JTAG test port for boundary scan  
test purposes.  
Low power, +2.5 Volt, CMOS technology, +3.3 Volt TTL compatible inputs and  
outputs (5V tolerant).  
304 pin Super BGA package.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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