PM5363 TUPP+622
TUPP+622
DATASHEET
PMC-1981421
ISSUE 4
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S
INTERFACES
IC1J1A:
The IC1J1 active (IC1J1A) bit monitors for low to high transitions on the
corresponding IC1J1 input. IC1J1A is set high on a rising edge of IC1J1, and
is set low when this register is read.
IPLA:
The IPL active (IPLA) bit monitors for low to high transitions on the
corresponding IPL input. IPLA is set high on a rising edge of IPL, and is set
low when this register is read.
ITMFA:
The ITMF active (ITMFA) bit monitors for low to high transitions on the
corresponding ITMF input. ITMFA is set high on a rising edge of ITMF, and is
set low when this register is read.
IDA:
The ID bus active (IDA) bit monitors for low to high transitions on the
corresponding input data bus. IDA is set high when rising edges have been
observed on all the signals on the input data bus, and is set low when this
register is read.
GSCLK_FPA:
The GSCLK_FP active (GSCLK_FPA) bit monitors for low to high transitions
on the corresponding GSCLK_FP input. GSCLK_FPA is set high on a rising
edge of GSCLK_FP, and is set low when this register is read.
OTMFA:
The OTMF active (OTMFA) bit monitors for low to high transitions on the
corresponding OTMF input. OTMFA is set high on a rising edge of OTMF, and
is set low when this register is read.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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