PM5362TUPP-PLUS
DATA SHEET
PMC-951010
ISSUE 6
SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR / PERFORMANCE MONITOR
Expected PSL
Accepted PSL
PSLM State
YYY
Mismatch
XXX ≠ 000, 001,
PDI Code
Each time an incoming PSL differs from the one in the previous multiframe, the
PSL unstable counter is incremented. Thus, a single bit error in the PSL in a
sequence of constant PSL values will cause the counter to increment twice, once
on the errored PSL and again on the first error-free PSL. The incoming PSL is
considered unstable when the counter reaches five. The counter is cleared when
the same PSL is received for five consecutive multiframes.
8.4.4 In-band Error Report
The in-band error report block optionally modifies the G1 byte of outgoing TU3
streams or the V5 byte of outgoing non-TU3 streams to report the number of
detected BIP errors and tributary path alarms. In-band error reporting is enabled
by the IBER regisiter bits in the RTOP In-band Error Reporting Configuration
registers.
When in-band error reporting is enabled for TU3 streams, bits 1 to 4 of the G1
byte is set to reflect the count of the number of BIP-8 errors detected in the
previous frame. Bit 5 is reports the RDI status. It is set high when the tributary
path alarms named in the Tributry Remote Defect Indication Control registers is
detected and the corresponding enable register bits is also set high. Similarly, bit
6 reports the auxiliary RDI status. It is set high when the tributary path alarms
named in the Tributry Auxiliary Remote Defect Indication Control registers is
detected and the corresponding enable register bits is also set high. Bits 7 and 8
are unmodified.
When in-band error reporting is enabled for non-TU3 streams, bit 3 of the V5
byte is set high when a BIP-2 error is detected in the previous multiframe. Bit 4 is
reports the RDI status. It is set high when the tributary path alarms named in the
Tributry Remote Defect Indication Control registers is detected and the
corresponding enable register bits is also set high. Similarly, bit 8 reports the
auxiliary RDI status. It is set high when the tributary path alarms named in the
Tributry Auxiliary Remote Defect Indication Control registers is detected and the
corresponding enable register bits is also set high. Bits 1, 2, 5, 6 and 7 are
unmodified.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
54
PMC [ PMC-SIERRA, INC ]
